NVIDIA Jetson Orin
GPU-based modules with a mature CUDA and TensorRT toolchain and broad model support. The basis of Gatepoint G4, for lines with many camera streams or models that need flexible pre-processing.
Technology we build on
We build on commercially available compute, open-source vision software and open industrial protocols, and choose silicon per application rather than per supplier. Here is what we use, and why.
Our approach
There is no single best edge AI chip. A two-camera seal inspection on a food line, a twelve-camera assembly check and a sealed enclosure at a substation in winter need different compute. Standardizing on one platform for all three means either paying for headroom you will never use or running out of it where you need it most.
So the Edge Stack is designed around portable models and interchangeable compute. Our Gatepoint variants use NVIDIA, Hailo and Qualcomm silicon; our models are kept in ONNX and compiled for each target; our camera pipelines and operating system images are built from open, well-maintained projects. We have no reseller or partner agreements that reward us for choosing one supplier over another.
Compute
GPU-based modules with a mature CUDA and TensorRT toolchain and broad model support. The basis of Gatepoint G4, for lines with many camera streams or models that need flexible pre-processing.
NVIDIA's Blackwell-generation Jetson platform, with far more compute and memory headroom than Orin. The basis of Gatepoint G8, for multi-camera lines and the on-device vision-language copilot.
A dedicated neural accelerator built on a dataflow architecture, with high throughput for its power draw. The basis of Gatepoint G2, which runs at 15 W typical on up to 4 camera streams.
Hailo's accelerator for generative workloads, which adds a direct DRAM interface so larger models can run beside the accelerator. We evaluate it for compact language and vision-language tasks where a full GPU module is more than the job needs.
Qualcomm's industrial and embedded processor family, which puts CPU, GPU and a neural processing unit on one chip. The basis of Gatepoint XT, rated −40 to 70 °C for outdoor, substation and cold-storage sites.
Pulsenode nodes run firmware we write on low-power microcontrollers, which is how a wireless vibration node reaches up to 5 years on a battery at hourly sampling.
Comparison
| Consideration | NVIDIA Jetson (Orin, Thor) | Hailo (8, 10H) | Qualcomm Dragonwing |
|---|---|---|---|
| Main strength | Flexibility and headroom; the broadest model and operator support | Throughput per watt on fixed, well-defined models | Integrated, efficient processors with wide-temperature options |
| Gatepoint variant | G4 (Orin-class), G8 (Thor-class) | G2 (Hailo-8-class) | XT (Dragonwing-class) |
| Toolchain from ONNX | TensorRT | Hailo Dataflow Compiler and HailoRT | ONNX Runtime with Qualcomm's NPU execution provider |
| Power and cooling | Moderate to high; the Orin-class G4 is fanless | Very low for the accelerator itself; G2 is fanless at 15 W typical | Low; suits sealed and outdoor enclosures |
| Generative and vision-language models | Strongest option, especially Thor-class | Emerging, with Hailo-10H | Smaller models |
| Where we use it | Many cameras, complex models, the copilot | One to four cameras, fixed tasks, tight power budgets | Outdoor, substation and cold-storage sites |
Software
Every model we train is kept in ONNX, an open model format. It is the file you receive when you export a model, and the source we compile from for each hardware target.
A cross-platform inference runtime with hardware-specific execution providers. We use it as a portable baseline, and on Qualcomm targets in production.
NVIDIA's inference optimizer and runtime. On Jetson-based Gatepoints it compiles each model for the specific module and precision, typically FP16 or INT8.
The Hailo Dataflow Compiler quantizes and compiles models for Hailo accelerators, and the HailoRT runtime executes them on Gatepoint G2.
The classic computer-vision library we use for calibration, geometric measurement, image statistics and the deterministic checks that don't need a neural network.
A pipeline framework for capture, conversion and hardware-accelerated processing, used to move frames from sensor to model with as little copying as the platform allows.
Operating system and security
Protocols
Our devices speak the protocols plants already use rather than one we would have to maintain forever: OPC UA, and MQTT with Sparkplug B, for data to SCADA, MES and historians; Modbus TCP and RTU, EtherNet/IP and PROFINET for controllers, meters and drives; and REST and webhooks for business systems. The integrations page covers the details, including how we handle PLC handshakes, and the Security & Trust Center covers how those connections are secured.
Selection
Choose the camera, optics, lighting or sensor that makes the signal clear. A better image often allows a smaller model, and a smaller model allows smaller compute.
Measure the real model on real frames, multiply by camera count and line speed, and leave room for the retrained models that will follow.
Cabinet temperature, sealing, available power and cooling rule some options out before performance is even discussed.
We design in modules we expect to support through our 7-year supply commitment, with a planned replacement path if one is discontinued.
Train once, compile per target. If the compute changes, the model is recompiled and revalidated, not rebuilt from scratch.
Why vendor-neutral
Silicon roadmaps move faster than production lines. A plant installing an inspection cell today expects it to run for a decade or more, and the compute module inside may be superseded several times in that span. A system built around one supplier's proprietary toolchain inherits that supplier's roadmap, pricing and end-of-life decisions.
Keeping models in ONNX, pipelines on open frameworks and interfaces on open protocols means a change of silicon is an engineering task we handle, not a re-procurement you pay for twice. It also means our recommendation for your line is based on your line. It is the same reason your trained models are yours to export.
NVIDIA, Jetson, TensorRT, Hailo, Qualcomm and Dragonwing are trademarks of their respective owners. Perflens is not affiliated with, sponsored by or endorsed by these companies; we name their products only to describe the technology our systems are built on.
FAQ
Yes. If your engineering standards specify a platform, we'll design to it and tell you plainly what it means for performance, power and lifecycle.
Yes. Models are kept in ONNX and compiled for each target. A move means recompiling and revalidating against your acceptance data before the new hardware goes live.
Yes — Linux, GStreamer, OpenCV and ONNX Runtime among others. Every component and its license is listed in the SBOM for each release.
No. We design sensors, optics, enclosures, boards and firmware around commercially available processors and accelerators, which is what keeps long-term supply realistic.
Tell us your camera count, line speed and environment. An engineer will tell you which Gatepoint we would use, and why.